As the integration density of integrated circuit devices continues to increase, it may become more difficult to form contact holes for these highly integrated devices. As is well known to those having skill in the art, contact holes are used to connect conductive layers of an integrated circuit to one another, through intervening dielectric layers.
For example, as the integration density of integrated circuits continues to increase, and device patterns become smaller, exposure technology has moved to shorter wavelengths, from g-line (436 nm) to i-line (365 nm) to KrF excimer laser (248 nm) and ArF excimer laser (193 nm). However, even with the increasingly short wavelengths, it may be increasingly difficult to form patterns of 0.1 .mu.m or less.
Multilevel resist processes have also been used to form contact holes for highly integrated devices. Unfortunately, multilevel resist processes can still produce undesired short circuits between adjacent contacts.
FIGS. 1 and 2 are cross-sectional views illustrating a conventional contact-forming process for an integrated circuit Dynamic Random Access Memory (DRAM) device. As shown in FIG. 1, device isolation regions 12 are formed in an integrated circuit substrate, such as a semiconductor substrate 10, to define active and inactive regions. A plurality of pad electrodes, such as polysilicon pad electrodes 14, also referred to as poly pads, are formed on the active region of the semiconductor substrate 10. A first interlayer insulating film 16 is formed on the substrate 10, including on the poly pads 14. Bit line electrodes 18 are formed on the first interlayer insulating film 16 over the inactive regions, between the poly pads 14. The bit line electrodes 18 include a capping layer 20 thereon and a sidewall spacer 21 on the sidewalls thereof. The capping layer 20 and the sidewall spacers 21 may comprise silicon nitride.
A second interlayer insulating film 22 is formed on the first interlayer insulating film 16 including on the bit line electrodes 18. A photoresist layer pattern 24 is formed on the second interlayer insulating film 22. Unfortunately, the "proximity effect" may cause the photoresist layer pattern 24 to be uneven, due to the small spacing the pattern. In particular, as shown in FIG. 1, the proximity effect may cause an undesired pattern shape 24' in the photoresist layer pattern 24. As is well known to those having skill in the art. The proximity effect occurs when light that is projected through a closely spaced mask pattern overlap and form an unclearly patterned area therebetween.
As shown in FIG. 2, contact holes 25 are formed to expose the poly pads 14 by etching the first and second interlayer insulating films 16 and 22 respectively, using the photoresist layer pattern 24 as a mask. Conductive material such as polysilicon is then deposited in the contact holes 25, to thereby form a storage polysilicon layer 26.
Unfortunately, as shown in FIG. 2, since the photoresist layer pattern 24 is improperly formed over some of the bit line electrodes due to the proximity effect, the photoresist layer pattern 24 exposes portions of the second interlayer insulating film 22 on some of the bit line electrodes. The second interlayer insulating film 22 is thereby etched between the contact holes during the formation of the contact holes 25. This can result in bridging between the storage polysilicon layers as shown by the dotted circle 28. This bridging can reduce the reliability and/or yield of the integrated circuits. Moreover, bridging may increase as the integration density of the integrated circuits increases.